14th International Forum on Embedded MPSoC and Multicore
July 7-11, 2014, Margaux, France
Slides available here!
Speaker:
Prof. Jason Cong, UCLA, USA
Title:
Automating Beyond High-Level Synthesis
Abstract:
High-level synthesis (HLS) is gaining wide acceptance in recent years, led by the success of Xilinx Vivado HLS tool (originated from the UCLA xPilot project and its spin-off AutoESL), which now has thousands of users worldwide. Modern HLS tools can generate efficient RTL code from behavior level C/C++ specifications with the quality that is comparable to manual RTL designs. But the quality of result may be highly dependent on how the input C/C++ is written. Our recent research focuses on source-code level transformation and optimization to generate HLS-friend behavior specifications.
In this talk, I shall discuss our recent work on polyhedral-based data reuse optimization and code generation, uniform and non-uniform memory partitioning, and simultaneous computation and communication optimization. Experimental results show that these transformations and optimization techniques lead to much better HLS results.
Bio:
JASON CONG received his B.S. degree in computer science from Peking University in 1985, his M.S. and Ph.D. degrees in computer science from the University of Illinois at Urbana-Champaign in 1987 and 1990, respectively. Currently, he is a Chancellors Professor at the Computer Science Department of University of California, Los Angeles, the director of Center for Domain-Specific Computing (CDSC), and co-director of UCLA/Peking University Joint Research Institute in Science and Engineering. He served as the chair of the UCLA Computer Science Department from 2005 to 2008.
Dr. Congs research interests include synthesis of VLSI circuits and systems, programmable systems, novel computer architectures, nano-systems, and highly scalable algorithms. He has over 390 publications in these areas, including 10 best paper awards and the 2011 ACM/IEEE A. Richard Newton Technical Impact Award in Electric Design Automation. He was elected to an IEEE Fellow in 2000 and ACM Fellow in 2008. He is the recipient of the 2010 IEEE Circuits and System (CAS) Society Technical Achievement Award "For seminal contributions to electronic design automation, especially in FPGA synthesis, VLSI interconnect optimization, and physical design automation."
Dr. Cong has graduated 31 PhD students. Many of them are now faculty members in major research universities, including Cornell, Georgia Tech., Peking University, Purdue, SUNY Binghamton, UCLA, UIUC, and UT Austin. Four of them were co-founders, together with Dr. Cong, of two startups originated from UCLA Aplus Design Technologies, which developed the first FPGA physical synthesis tool (acquired by Magma in 2003, now part of Synopsys) and AutoESL Design Technologies, which led to the most widely used high-level synthesis tool Vivado HLS (acquired by Xilinx in 2011). Others are in key R&D or management positions in various companies related to the information technologies, such as Bloomberg, Broadcom, Cadence, Facebook, Google, IBM, Intel, Mentor Graphics, Micron, Synopsys, and Xilinx.
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