Jie Han

University of Alberta, Canada

Approximate and Stochastic Ising Machines

Abstract

The Ising model is useful in searching for (sub-)optimal solutions of combinatorial optimization problems (COPs). CMOS implementations of Ising model-based solvers, commonly referred to as Ising machines, provide reliable and accurate solutions with flexible and dense connectivity. However, they incur a significant hardware overhead. Approximate computing, as a low-power technique, offers a way to reduce hardware complexity, while stochastic computing is efficient in simulating the dynamics of the Ising model. The approximations introduced by these techniques may be beneficial in helping the system escape from local minima. In this talk, we discuss the potential of using approximate and stochastic computing to improve the performance of Ising machines.

Biography

Jie Han received the B.Sc. degree in electronic engineering from Tsinghua University, Beijing, China, and the Ph.D. degree from the Delft University of Technology, The Netherlands. He is currently a Professor and the Director of Computer Engineering in the Department of Electrical and Computer Engineering at the University of Alberta, Edmonton, AB, Canada. Dr. Han is a recipient of the Best Paper Awards at the Design, Automation and Test in Europe Conference (DATE 2023) and the International Symposium on Nanoscale Architectures (NANOARCH 2015), as well as several Best Paper Nominations at the 25th Great Lakes Symposium on VLSI (GLSVLSI 2015), NANOARCH 2016, the 19th International Symposium on Quality Electronic Design (ISQED 2018) and DATE 2022. He was nominated for the 2006 Christiaan Huygens Prize of Science by the Royal Dutch Academy of Science (Koninklijke Nederlandse Akademie van Wetenschappen (KNAW) Christiaan Huygens Wetenschapsprijs). His work was recognized by the 125th anniversary issue of the Science Magazine, for developing a theory of fault-tolerant nanocircuits (2005). He serves (or served) as an Associate Editor for the IEEE Transactions on Nanotechnology, the IEEE Embedded Systems Letters, the IEEE Nanotechnology Magazine, the IEEE Transactions on Emerging Topics in Computing (TETC), the IEEE Circuits and Systems Magazine (awarded the Best Associate Editor for 2023), the IEEE Open Journal of the Computer Society, Microelectronics Reliability (Elsevier) and the Journal of Electronic Testing: Test and Application (JETTA, Springer Nature). He served as a General Chair of NANOARCH 2021, GLSVLSI 2017 and the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) 2013, and a Technical Program Committee (TPC) Chair (or Co- Chair) of the IEEE International Conference on Nanotechnology (IEEE NANO 2026), NANOARCH 2022, GLSVLSI 2016, DFT 2012 and the Symposium on Stochastic & Approximate Computing for Signal Processing and Machine Learning, 2017.