Ran Ginosar

Technion-Israel Institute of Technology, Israel

RC64: Space-ready high performance, low power manycore

Abstract

RC64 was fabricated using TSMC 65nm in 2017. It integrates 64 DSP cores, 4MByte on-chip shared memory organized in 256 banks, logarithmic network connecting all cores to all memory banks, and a hardware scheduler. High speed links and embedded networking enable easy scaling by employing many RC64 chips. A novel shared memory programming model is employed. There is no need for cache coherency, and correctness of sharing is formally verified at compile time. OS Kernel and multiple applications have been implemented, including DSP and machine learning, showing near-optimal speedup and high performance-to-power ratio. RC64 is designed as rad-hard for use in Space. High reliability features are embedded in the hardware and in system software. Ideas about scaling, as well as about the programming model, will be presented as discussion topics.

Biography

Ran Ginosar has earned his BSc in EE&CS from the Technion—Israel Institute of Technology in 1978, and his PhD in EECS from Princeton University in 1982. He has conducted research at Bell Laboratories, Intel and the University of Utah. He joined the Technion Faculty in 1983, where he is a Full Professor of Electrical Engineering and Head of the VLSI Systems Research Center. Ran co-founded several companies in areas of electronic imaging, medical devices, wireless communications and manycore architecture. Prof. Ginosar serves as the President of Ramon.Space, a company engaged in high-performance, low-power and highly reliable computing for Space applications in Satellites and Spacecraft.