Wayne Burleson

UMass Amherst

Efficient and Secure AI at the Edge: Two Tales

Abstract

AI at the Edge enables numerous compelling applications due to its autonomy, fast response, private data and lack of reliance on cloud.

However AI at the Edge needs to be efficient due to power and cost requirements, and also secure against both remote and physical threats.

In this talk, I will describe two ongoing projects that involve extensive collaborations from device-level to circuits, computing, applications and  and human factors.

First I describe a collaboration with my close colleague Qiangfei Xia at UMass funded by the US Army Research Lab.

The objective is to explore analog computing based on memristor crossbar arrays for RF signaling processing and classification.

The conjecture is that operating directly on incoming RF analog signals allows more power efficient and lower latency classification.

This work has applications in military as well as commercial cognitive radio.

We explore security aspects including ML model protection through watermarking and scrambling, and also ML adversarial attacks.

Second, in significant contrast, I describe an NSF-funded collaboration with Kevin Fu and Silvia Xu at Northeastern University,  Human Subjects expert Jenny Amos at UIUC, and two medical doctors: Neurosurgeon Erika Peterson at U Arkansas and Anesthesiologist Julian Goldman at Mass General Hospital.   This project explores security and privacy aspects of the latest and future generations of implantable neuro-devices, from brain computer interfaces to spinal cord and brain stimulation.   Security and privacy aspects are critical since human neuro data (literally what you are thinking and feeling!) as well as human health and safety are at risk.

Devices must be implantable, portable, usable, energy efficient, small and reliable over a long lifetime which complicates the implementation of standard security techniques.   We tear-down implantable devices and analyze both hardware and software for vulnerabilities.

We have developed a novel RISC-V architecture targeted to secure future implantable neuro-processing with domain-specific AI accelerators for anomaly detection as well as adaptive therapies.

About this year’s MPSOC theme, Software-Defined Hardware, I think both of these projects have relevance.

In the first, we question the idea of Software-Defined Radio due to the high-cost of A/D conversion before demodulation and down-sampling.

Instead we show that Analog accelerators for fast and approximate RF classification can be used in conjunction with SDR.

In the second, we show that a dual-core RISC-V SOC with AI and PQC accelerators can provide an efficient and secure system, but also be programmable and updatable over a long lifetime.