10th International Forum on Embedded MPSoC and Multicore
June 28 - July 2 2010, Gifu city, Gifu, Japan



MPSoC'10 program

  • Keynotes on key MPSoC and multicore SoC trends.
  • Technical sessions to present strategic directions and state-of-the-art research. The program will be made of in-depth technology challenge presentations and educational panels made of short keynotes followed by discussions. All the presentations will be made by CTO-level speakers. The sessions will cover:

    • MPSoC Architecture
      • On-chip interconnect for MPSoC and Multicore architectures
      • Memory architecture for parallel computing
      • 3D IC and Computing
    • MPSoC Applications Platforms
      • Killer applications for MPSoC
      • MPSoC and Multicore platforms
      • HW vs. SW reconfiguration
      • Mixed signal
    • Control Theory applied to MPSoC
    • MPSoC Design Methodologies
      • HW and SW Composition
      • HW-SW debug & verification
      • Testing
      • Case studies
      • HW-SW interfaces codesign.
    • SW Programming
      • Embedded RTOS
      • Flexible CPU
      • Parallel programming models
      • Execution Models for MPSoC and Multicore architectures
  • An executive half day session including presentations by top executives, investors and analysts to discuss challenges and opportunities for future SoC applications and technologies.