Norbert Wehn
Professor at University of Kaiserslautern, Germany
The (DRAM) Memory Challenge in Computing Systems
Abstract
It is well known that DRAM memory performance cannot keep pace with the performance of today’s multicore compute systems. In addition to the memory bandwidth problem, there are other challenges like power and reliability issues. Moreover, new memory architectures are emerging that result in heterogeneous memory hierarchies. In this talk, we will give an overview on various optimization techniques to optimize bandwidth, power and reliability in DRAM based and emerging memory systems.
Biography
Norbert holds the chair for Microelectronic System Design in the department of Electrical Engineering and Information Technology at the University of Kaiserslautern. He has more than 300 publications in various fields of microelectronic system design and holds several patents. Two start-ups spinout of his research group. His special research interests are VLSI- architectures for mobile communication, forward error correction techniques, low-power techniques, advanced SoC and memory architectures, 3D integration, reliability issues in SoC, IoT and hardware accelerators for financial mathematics and big data applications.