Yuan Xie
UCSB, USA
Memory-centric architecture to close the gap between compute and memory
Abstract
The increasing gap between the computing of processor and the memory has created the "memory wall" problem in which the data movement between computing and memory subsystem is becoming the bottleneck of the entire computing system, ranging from cloud servers to end-user devices. As we enter the era of big data, many emerging data-intensive workloads become pervasive and mandate very high bandwidth and heavy data movement between the computing units and the memory. To bridge the gap between the computing and the memory, extensive work has been done to explore possible solutions, which can be classified into two categories: (1) Memory-Rich Processing Units, which increases the capacity of the on-chip/in-package memory with emerging 3D stacked memory, so that the data movement between computing units and memory can be reduced. (2) Compute-capable Memory. This approach tries to move computation inside (or closer) to memory. This is sometimes called processing-inmemory (PIM) or near-data computing (NDC). This talk will present recent work in UCSB SEAL group on the efforts of memory-centric architectures.
Biography
Yuan Xie received the B.S. degree in electronic engineering from Tsinghua University, Beijing, in 1997, and the M.S. and Ph.D. degrees in electrical engineering from Princeton University in 1999 and 2002, respectively. He is currently a Professor in the Electrical and Computer Engineering department at the University of California at Santa Barbara. Before joining UCSB in Fall 2014, he was with Pennsylvania State University, AMD Research, and IBM Microelectronic Division's Worldwide Design. He is currently Editor-in-Chief for ACM Journal of Emerging Technologies in Computing Systems (JETC), Senior Associate Editor for ACM Transactions on Design Automation for Electronics Systems (TODAE). He is a Fellow of IEEE.
Prof. Xie is a IEEE Fellow. He is also a recipient of the NSF CAREER award, SRC Inventor Recognition Award, IBM Faculty Award, and Best Paper Awards (HPCA15, ICCAD14, GLSVLSI14, ISVLSI12, ISLPED11) and Best Paper Award Nominations (MICRO13, ASPDAC09-10, DATE13, ICCAD06). He has published more than 200 research papers in prestigious IEEE/ACM journals and conferences, in the area of computer architecture, EDA, VLSI designs, and embedded systems. He is currently Editor-in-Chief for ACM Journal of Emerging Technologies in Computing Systems (JETC), Senior Associate Editor for ACM Transactions on Design Automation for Electronics Systems (TODAE), Associate Editor for IEEE Transactions on Computers (TC) and IEEE Embedded System Letter (ESL). He is a member of both the ISCA Hall of Fame and the HPCA Hall of Fame, the two premier conferences in computer architecture, that recognize the top authors in those conferences.