PRELIMINARY AGENDA
Sunday July 6 - 7:00 - 9:00 p.m. - Reception & Registration
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8:30 |
Giovanni De Micheli, Stanford
U., USA
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Jan
Madsen, TU of Denmark, Denmark
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John
Goodacre, ARM, UK
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SoC Validation and Test Avi
Ziv, IBM Research Lab, Israel
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Andrea Cuomo, STMicroelectronics, Italy
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10:00 |
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10:30 | Frank Pospiech, Alcatel HQ HW Coord., HdS Program Manager, Belgium | Kang
Shin, U. of Michigan, USA
Ahmed Jerraya, TIMA, France |
Faraydon
Karim, STM, USA
Rolf Ernst, TU Braunschweig, Germany Hiroto Yasuura, Kyushu U., Japan |
Hannu
Tenhunen, KTH, Sweden
Georges Gielen, KU Leuven, Belgium |
Moderator: Peter Clarke, Semiconductor Business News, CMP Europe Ltd., UK |
12:00 | 30 min. panel discussion with 2 lecturers | 30 min. panel discussion with 5 lecturers | 30 min. panel discussion with 5 lecturers | 30 min. panel discussion with 5 lecturers | |
12:30 |
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14:00 |
Trevor Mudge, U. of Michigan, USA |
Rudy
Lauwereins, IMEC & K.U. Leuven, Belgium
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Kees
Goossens, Philips Research Laboratories, The Netherlands
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Chris
Rowen, Tensilica, USA
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15:30 |
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16:00 | Philippe Magarshack, STM, France | Pierre
Paulin, STM, Canada
Wolfgang Rosenstiel, FZI, Germany Luciano Lavagno, Politecnico di Torino, Italy
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Norbert Wehn, U. of Kaiserslautern, Germany
Marcello Coppola, STM, France Axel Jantsch, KTH, Sweden
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Kees
Vissers, UC Berkeley, USA
Yankin Tanurhan, Applications and IP Solutions Group, Actel Corporation, USA Elliot Mednick, Cadence Design Systems, USA |
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17:30 | 30 min. panel discussion with 2 lecturers | 30 min. panel discussion with 5 lecturers | 30 min. panel discussion with 5 lecturers | 30 min. panel discussion with 5 lecturers | |
19:30 |
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