Norbert Wehn

University of Kaiserslautern, Germany

When Massive GPU Parallelism Ain’t Enough: A New FPGA-based Accelerator for 2D-LSTM Neural Networks

Abstract

Multidimensional Long Short-Term Memory (MD-LSTM) neural network is an extension of one dimensional LSTM for data with more than one dimension that allows MD-LSTM to show state-of-the-art results in various applications including handwritten text recognition, medical imaging, and many more. However, efficient implementation suffers from very sequential execution that tremendously slows down both training and inference compared to other neural networks. This is the primary reason that prevents intensive research involving MD-LSTM in recent years, despite large progress in microelectronics and architectures. In this talk, we present the first hardware architecture for MD-LSTM. We conduct a systematic exploration of precision vs. accuracy trade-off using challenging dataset for historical document image binarization from DIBCO 2017 contest, and well known MNIST dataset for handwritten digits recognition. Our new architecture is implemented as FPGA-based accelerator that outperforms NVIDIA K80 GPU implementation in terms of runtime by up to 50× and energy efficiency by up to 746×. At the same time, our accelerator demonstrates higher accuracy and comparable throughput in comparison with state-of-the-art FPGA-based implementations of multilayer perceptron for MNIST dataset.

Biography

Norbert holds the chair for Microelectronic System Design in the department of Electrical Engineering and Information Technology at the University of Kaiserslautern. He has more than 300 publications in various fields of microelectronic system design and holds several patents. Two start-ups spinout of his research group. His special research interests are VLSI-architectures for mobile communication, forward error correction techniques, low-power techniques, advanced SoC and memory architectures, 3D integration, reliability challenges in SoC, machine learning, IoT and hardware accelerators for big data applications.