Rolf Ernst

TU Braunschweig, Germany

Reliable but Efficient Worst Case Design for Embedded Performance MpSoC

Abstract

Advanced embedded systems application require high performance MpSoCs that cannot efficiently be programmed based on traditional analytical worst-case timing guarantees. Typical design approaches either ignore the concerns and go for extensive tests and application robustness, or put tight usage constraints hampering system performance and function innovations. This is a unsatisfactory situation. There have been numerous attempts to resort to statistics, e.g., enforcing randomized behavior by architectural means or just assuming random behavior applying statistics for highly reliable systems, such as Extreme Value Theory. Both require strong assumptions that are not easily found in practical MpSoC.

By focusing on chip timing repeatability, we observed that the observed timing variations of recent performance MpSoC are obviously highly influenced by the huge number of on-chip asynchronies and races in core, network, and memory architectures. These physical effects lead to chip-individual traces and timing that makes classical worst-case execution models rather meaningless. On the positive side, substantial timing outliers require the constructive coincidence of a large number of individual local effects, at least in applications with hundreds of million cycles, such as in machine learning. As a consequence, large timing outliers in properly configured software systems are extremely rare. Investigations with different architectures and ML applications using different statistical and correlation tests show that the resulting application timing can be well modeled as average timing superimposed by white noise.  Such timing, if validated and exploited in systems design, can give rise to a new and much more efficient worst-case design style than traditional methods. Examples will be given.

Biography

Dr. Rolf Ernst is a professor at the Technische Universität Braunschweig, Germany. He received a BSc, MSc in CS and a Ph.D. in EE from the University of Erlangen-Nuremberg. After 2 years at Bell Labs in Allentown, PA, he joined the TU Braunschweig, Institute of Computer and Network Engineering (IDA). His interests cover aspects of design and architecture of embedded and cyber-physical systems, with a focus on real-time and safety-critical systems. He has and had research contracts with automotive, avionics, and semiconductor companies throughout the world. He and his team have been active in the AUTOSAR standardization, the world standard for automotive software. He is an IEEE Fellow and a member of the German Academy of Science and Engineering, acatech. He received the EDAA Achievement Award 2014.

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