Orlando Moreira

Snap Inc., The Netherlands

MEET: Temporal Sparsity Exploitation that will not break your (memory) bank

Abstract

Deep Neural Networks (DNNs) are accurate but computationally demanding, especially for video processing. Temporal sparsity exploitation in an event-driven architecture like Snap’s NPU, NeuronFlow v4, can improve efficiency, but current methods require substantial memory for neuron state storage, a critical limitation for embedded platforms.

This talk introduces MEET, an optimization framework specifically designed to enhance the memory efficiency of temporal sparsity exploitation in NeuronFlow v4

MEET addresses the memory bottleneck of temporal sparsity exploitation by using Neural Architecture Search to the re-design of the neural network topology, preserving accuracy while dramatically reducing memory requirements, and achieving impressive gains in both latency and power consumption in NeuronFlow v4 silicon.

Biography

Orlando Moreira is the Chief Computer Architect for AI Cores, at Snap Inc. in Eindhoven, Netherlands. His expertise encompasses computer architecture, edge AI, embedded systems, real-time systems, and data flow methodologies. Before  Snap Inc., Moreira held the position of Chief Architect at GrAI Matter Labs, where he was responsible for the compute architecture and software development kit (SDK) roadmaps.

Over the years, he worked for Philips Research, ST-Ericsson, Ericsson, and Intel (where he was group leader for programming and core tools – compiler, simulator, debugger and hw generation).

Throughout his career, Moreira has contributed published work to the field of computer architecture, compilers, modeling and temporal analysis, particularly in the areas of embedded and cyber-physical systems, as well as real-time systems.

He holds a PhD in Electrical Engineering from the University of Eindhoven.

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