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- Kerry Bernstein, IBM., USA
Architectural Directions for Future Nanoscale Computing Systems
- Sungjoo Yoo, POSTECH, Korea
Low power hybrid PRAM/DRAM main memory
- Hsien-Hsin Sean Lee, Georgia Institute of Technology, USA
Toward the design of robust and self-healing memories
- Hiroyuki Tomiyama, Ritsumeikan University, Japan
Challenges of Programming Embedded Many-Core SoCs with OpenCL
- David Kleidermacher, Green Hills Software, USA
Multicore Embedded/Mobile Virtualization Update
- Raphaël David, CEA LIST, France
Hardware support for online resources management
- Soo-lk Chae, Seoul National University, Korea
Optimization of an H.264 decoder using its communication- centric model
- Dongrui Fan, Chinese Academy of Science, China
Godson-T: A High-Efficient Many-Core Architecture for Parallel Program Executions
- Paolo Faraboschi, HP Labs, Spain
System-Level Integration for Scale-out Computing
- Patrick Blouet, ST Ericsson, France
Mobile cloud computing
- John Goodacre, ARM, UK
Understanding what those 250 million transistors are doing
- Michael Chang, Global Unichip, Taiwan
A 28nm Dual Cores SoC Design
- Bing Sheu, Director of R&D, TSMC
Design and Technology for Future Computing Systems
- Koji Inoue, Kyushu University, Japan
Adaptive Execution on 3D Microprocessors
- Yukoh Matsumoto, TOPS Systems Corporation, Japan
COOL System: Low-Power 3-D Heterogeneous Multi-Core/Multi-Chip Architecture
- David Atienza, EPFL, Swizerland
System-Level Thermal Management of 3D MPSoCs with Active Cooling
- Yuan Xie, Pennsylvania State University, USA
3D NVM for Exascale Computing
- Ahmed Jerraya,CEA LETI, France
3D-IC for HPC
- Tohru Ishihara, Kyushu University, Japan
Energy Characterization of Embedded Processors for Software Energy Optimization
- Yoshinori Takeuchi, Osaka University, Japan
Task Assignment Method for DVS based multiprocessor SoC
- Edith Beigne, CEA LETI, France
Fine-grain DVFS power-aware control
- Youn-Long Lin, National Tsing Hua University, Taiwan
Multiprocessor Scheduling taking into account Energy Harvesting and Storage
- Yuichi Nakamura, NEC, Japan
A software development toolset for multi-core processors
- Emil Matus, Technical University Dresden, Germany
Benchmarking of Dataflow Programming Models for MPSoC
- Jenq-Kuen Lee, National Tsing Hua University, Taiwan
Support of C++ Compiler for Embedded Multi-Core DSP Systems
- Ruchir Puri, IBM, USA
Design and CAD challenges: 22nm and beyond
- Lasse Harju, ST Ericsson, France
Sensor processing and power management in smartphone platforms
- Rudy Lauwereins, IMEC, Belgium
BOA-ADRES: a scalable baseband processor template for Gbps radios
- Kees van Berkel, STEricsson, Eidhoven Univ.
Multicore for 4G: 3GPP versus ITRS
- Chris Rowen, Tensilica, USA
Design of a 100GMAC/sec DSP Core for 4G Wireless
- Yankin Tanurhan, Synopsys, USA
MPSoC Subsystems: A New Reuse Paradigm
- Martin Schoeberl, Technical University of Denmark
A Time-predictable Microprocessor: the Patmos Approach
- Kees Goossens, Eindhoven University of Technology, Netherland
Architecture Requirements for Composability and Predictability
- Martti Forsell, VTT, Finland
MCPA -- MultiCore Portability Abstraction
- Charlies Janac, Arteris InC., USA
Interchip Link Technology
- Gerhard P. Fettweis, TU Dresden, Germany
Exploration of NoC Design & Management Concepts for MPSoC
- Marcello Coppola, ST, France
SoC interconnect: future directions and challenges
- Pieter van der Wolf, Synopsys, Netherland
Audio Subsystem Solutions for Consumer SOCs
- Drew Wingard, Sonics, US
Leveraging Multichannel 3D in MPSOCs
- Paul Heysters, Recore systems, Netherland
A Glimpse into Future Reconfigurable Many-cores for Embedded Stream Processing
- Kees Vissers, Xilinx, USA
Programming for performance in FPGAs using multiple processors and accelerators with C/C++ programming
- Kiyoung Choi, Seoul National University, Korea
Virtualized Processor Power Management
- Ian O'connor, Lyon institute of Nanotechnology, France
Nanofabrics for reconfigurable computing cores
- Omar Hammami,Lensta Paristech, France
NMPSOC Synthesis: Combining NOC Synthesis with Multiobjective Design Space Exploration on large Scale Emulator
- Kunio Uchiyama, Hitachi, ltd., Japan
Heterogeneous Multicore Processor Technologies for Embedded Systems
- Pierre Paulin, ST, Canada
Exploring H/W and S/W solutions to MP-SOC platform mapping: An Industrial Perspective
- Nakajima Masaitsu, Panasonic, Japan
Next Generation Multi-Processor Architecture for "Network Era UniPhier"
- Norbert Wehn, University of Kaiserslautern,
Hardware Accelerators for Financial Mathematics - Methodology, Results and Benchmarks
- Takashi Miyamori, Toshiba, Japan
Heterogeneous Multi & Many Core Processors for Multimedia Applications
- Tsuyoshi Isshiki, Tokyo Insituteof Technology, Japan
Trace-Driven Workload and Bus Traffic Simulation for MPSoC Architecture Evaluation
- Bart Kienhuis, Compaan Design, Netherland
Using C-to-Dataflow for portable and efficient mapping on Heterogeneous MultiCore designs
- Joachim Kunkel, Synopsys, USA
The Role of Prototyping in SoC Development
- Rolf Ernst, Technical University of Brauschweig,
MPSoC for safety critical applications – from multicore to manycore
- Frédéric Pétrot, Tima Laboratory, INP-Grenoble, France
An analytical model for Many-Functionally Asymmetric Core SoC Architectures
- Sri Parameswaran, University of New South Wales, Australia
Security and Reliability in an MPSoC environment.
- Koichiro Yamashita, Fujitsu, Japan
A software centric system for OS scheduling scheme in the upstream phase
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