MPSoC'05 presentations

 

Tutorial Session T1: MPSoC: HW Challenges

- "Reliability and Reliable Design", Giovanni De Micheli, EPFL, Switzerland

Tutorial Session T2: MPSoC: SW challenges

- "Foundations for Model-Based Design", Janos Sztipanovits , ISIS-Vanderbilt University , USA

- "Software-Centric System-Level Design", Hiroaki Takada , Nagoya University, Graduate School of Information Science, Japan

Session 1: From Networking to Network-on-Chip

- "On-Chip Interconnects: Circuits and Signaling from an MPSOC Perspective", Wayne Burleson, ECE Dept., University of Massachusetts Amherst , USA

- "Global Networking versus Networking-on-Chip", Martina Zitterbart, Institute of Telematics , University of Karlsruhe (TH) Germany

Session 2: Network-on-Chip  

- "From Spaghetti wires to NoC", Marcello Coppola, ST, France

- "NoC: the Arch key of IP integration methodology", Alain Fanet , Arteris , France

- "Systems on Chips: Personal Computers or correct performance?", Kees Goossens, Embedded Systems Architectures on Silicon (ESAS) group , IC Design sector , Philips Research, The Netherlands

Session 3: The CELL Architecture

- "Cell Architecture and Broadband Engine Processor", Ted Maeurer, IBM Systems and Technology Group, Austin , USA

- "The Design and Implementation of a First-Generation CELL Processor: A Multi-Core SuperComputer SoC", Dac C. Pham , IBM Systems and Technology Group, Austin , USA

Session 4: MPSoC Platforms

- "Formal methods in MpSoC architecture optimization", Rolf Ernst, TU Braunschweig , Germany

- "SoC Platforms of the Future: Challenges and Solutions", Pierre G. Paulin , ST, Ottawa , Canada

- "Optimization of Reliability and Power Consumption in MPSoCs", Tajana Šimunic Rosing, UC San Diego , USA

- "Breaking the Interleaving Bottleneck in Communication Applications for Efficient SoC Implementations", Norbert Wehn, University of Kaiserslautern , Germany

Session 5: MPSoC: Theory & Practices

- "New challenges in Smart Card design", Jean-Pierre Tual, Axalto , France

Session 6: Technologies for MPSoC

- "Surfing the wave of   Moore 's law?", Rafael Peset Llopis, Philips Consumer Electronics, The Netherlands

- "Bridging the gap between semiconductor technology and design: a memory case study", Rudy Lauwereins, IMEC, Belgium

- "Multi-level Co-Simulation of Mixed Technology Microsystems", Steven P. Levitan, University of Pittsburgh , USA

- "System level Stimuli Generation for the Cell processor", Yoav Katz , IBM Labs in Haifa , Israel

Session 7: HW & SW Programming for MPSoC

- "Flexible multi-processing memory architectures", Kees Vissers,  Xilinx , USA

Session 8: Application of Programming Models

- "Measuring SMP", John Goodacre, ARM Ltd., UK

- "A class-based programming model for heterogeneous MPSoC", Mark Lippett, Ignios Ltd., UK

- "Redefis:  An SoC Platform for Implementing Application-Specific or User-Custom Logic", Kazuaki Murakami, Kyushu University , Japan

- "SOC: Security-on-chip!", Srivaths Ravi, NEC Laboratories America , USA

Session 9: Beyond SoC Practices

- "Sub-Lithographic Semiconductor Computing Systems", André DeHon , California Institute of Technology , USA

- "Self-Calibrating Interconnects: Breaking the Worst-Case Design Paradigm", Paolo Ienne , EPFL, Switzerland

- "MPSoC Clock and Power Challenges", Olivier Franza, Intel Corp., USA

Session 10: Programming Models for MPSoC

- "HW-SW Interfaces CoDesign for Multi-Processor SoC", Ahmed Jerraya, TIMA Laboratory , France

- "Cross-layer Modelling for Heterogeneous MPSoCs", Jan Madsen, Technical University of Denmark , Denmark

- "Specification and Validation for Heterogeneous MP-SoCs", Gabriela Nicolescu , Ecole Polytechnique de Montréal , Canada

- "Parallel Programming Model for Distributed Architecture MPSoC", Yuriy Sheynin, St. Petersburg State University of Aerospace Instrumentation, Russia

- "Introducing Mixed Signal into FPGA based MPSoC", Yankin Tanurhan, Actel Corporation, USA

Session 12: Application for Core Based Design

- "Multithreaded processors in Embedded Applications", Steffen Buch, Infineon Technologies AG, Germany

- "Using Configurable CPUs on SOC Platforms", Trevor Mudge, The University of Michigan , Ann Arbor , USA

- "A Service Based Component Model for Multi-Level HW/SW Specifications", Frédéric Pétrot, TIMA Laboratory , France

- "Communication Platforms for Network-on-Chip", Hannu Tenhunen, Royal Institute of Technology (KTH), IT-Universitet, Sweden

- "Everything I know about software radio in 10 minutes or less", Wayne Wolf, Dept. of EE, Princeton University, USA

Business Session B1: Design Methods Trends

- "Designing Programmable Platforms: From ASIC to ASIP", Heinrich Meyr, Coware Inc.,USA & ISS, Aachen University of Technology , Germany

- "Parallel Programming Models for Heterogeneous MPSoCs", Pieter van der Wolf, Philips Research, The Netherlands

- "Security Technologies for SoCs", Hiroto Yasuura, System LSI Research Center, Kyushu University, Japan

Business Session B2: Business Models for MPSoC

- "DFM: Where Design, Lithography and Process Meet", Raul Camposano, Sr. VP, GM and CTO, Synopsys , USA

- "Multimedia SoC Design Trends", Santanu Dutta , nVIDIA Corporation, Digital Media Processor Group, USA

- "SOC Design Foundry", Youn-Long Steve Lin, National Tsing Hua University & Global Unichip Corp., Taiwan